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AES-GCM cores


AES-GCM is an authenticated encryption algorithm designed to provide both authentication and privacy. Developed by David A McGrew and John Viega, it uses universal hashing over a binary Galois field to provide authenticated encryption.

GCM was designed originally as a way of supporting very high data rates, since it can take advantage of pipelining and parallel processing techniques to bypass the normal limits imposed by feedback MAC algorithms. This allows authenticated encryption at data rates of many tens of Gbps, permitting high grade encryption and authentication on systems which previously could not be fully protected. More recently GCM is being specified for use in lower rate applications due to its ease of use and scalability.

AES-GCM is specified for use in a number of recent standards; for example it is one of the options specified by the IEEE 1619 group for securing data-at-rest stored on tape media. In networking, it is the security algorithm specified for use in MACsec (802.1AE), and in the ANSI Fibre Channel Security Protocols (FC-SP).

Helion AES-GCM Solutions

Helion offer a broad selection of AES-GCM solutions, covering all throughput requirements from less than 50Mbps right up to in excess of 40Gbps in any of the target technologies we support. This allows the user to have a very well matched solution, without having to compromise in terms of area or performance.

Core type Typical Throughput Footprint
218-cycle AES-GCM 0 to 100Mbps ultra compact
48-cycle AES-GCM 0 to 500Mbps very compact
19-cycle AES-GCM 500Mbps to 2Gbps compact
Giga AES-GCM 2Gbps to 40Gbps scalable

The table above shows the selection of standard AES-GCM solutions currently available from Helion. For the mainstream versions, the core name reflects the nominal number of clock cycles taken to encrypt or decrypt each 16-byte block of information with a 128-bit key; so for example, the 19-cycle core processes each 128-bit AES block in 19 clock cycles, and has a throughput of 6.73Mbps per MHz.

The Giga AES-GCM core is a separate product, optimised for extremely high throughput operation; please see the special Giga AES webpage for more details.

All these high performance AES-GCM cores are available in versions for use in ASIC, Altera, Microsemi (Actel) and Xilinx FPGA, and in common with all Helion IP cores they have been designed with each technology firmly in mind to yield the very best and most efficient results.

To find out how these AES-GCM solutions can be used in your particular application, please contact Helion so that we can discuss the options in more detail.

Measured Area and Performance
48-cycle 128-bit key version - for low/mid rate applications

ASIC (0.13um CMOS) >800 Mbps <TBA gates -
Altera Cyclone III (-6) >430 Mbps 1925 LEs 3 M9Ks
Altera Stratix II (-3) >640 Mbps 1136 ALMs 3 M4Ks
Microsemi ProASIC3 (-2) >240 Mbps 4293 tiles 3 RAMs
Microsemi AX (-2) >340 Mbps 3636 cells 6 RAMs
Xilinx Spartan-3 (-5) >440 Mbps 698 slices 3 RAMB16s
Xilinx Spartan-6 (-3) >530 Mbps 340 slices -
Xilinx Artix-7 (-3) >770 Mbps 393 slices -
Xilinx Virtex-5 (-3) >800 Mbps 415 slices -
Xilinx Virtex-6 (-3) >950 Mbps 356 slices -
Xilinx Virtex-7 (-3) >1100 Mbps 415 slices -
Xilinx Kintex-7 (-3) >1100 Mbps 406 slices -
Xilinx UltraSCALE (-2) >1200 Mbps 217 CLBs -
Xilinx UltraSCALE+ (-2) >1500 Mbps 211 CLBs -

19-cycle 128-bit key version - for higher rate applications

ASIC (0.13um CMOS) >2.5 Gbps <TBA gates -
Microsemi ProASIC3 (-2) >680 Mbps 5618 tiles 10 RAMs
Xilinx Spartan-3 (-5) >860 Mbps 1133 slices 9 RAMB16s
Xilinx Spartan-6 (-3) >1.3 Gbps 639 slices -
Xilinx Artix-7 (-3) >2.2 Gbps 781 slices -
Xilinx Virtex-5 (-3) >2.2 Gbps 678 slices -
Xilinx Virtex-6 (-3) >2.4 Gbps 635 slices -
Xilinx Kintex-7 (-3) >3.2 Gbps 767 slices -
Xilinx Virtex-7 (-3) >3.2 Gbps 792 slices -
Xilinx UltraSCALE (-2) >3.5 Gbps 454 CLBs -
Xilinx UltraSCALE+ (-2) >4.3 Gbps 458 CLBs -

Remember that these are just two examples from a suite of many AES-GCM solutions we have available, so if you are looking for lower area or higher rate GCM cores, support for non-listed target technologies or maybe support for the longer keysizes, please contact Helion for full information.

Product Briefs

For full details of all the Helion AES-GCM cores, please download the appropriate Product Brief in PDF format below.



For more detailed information on this or any of our other products and services, please feel free to email us at helioncores@heliontech.com and we will be pleased to discuss how we can assist with your individual requirements.

Product Brief Quicklinks

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