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RSA and Modular Exponentiation cores

Overview

Modular Exponentiation based on long number arithmetic is the foundation for a number of public key encryption and key exchange mechanisms.

The most well known of these is probably RSA. This algorithm was first described in 1977 by Ron Rivest, Adi Shamir and Len Adleman at MIT, its name being taken from the three inventor's initials. RSA is suitable for both signing as well as encryption, and is still very widely used in electronic commerce protocols; it is considered to be secure given sufficiently long keys.

Another well known application for Modular Exponentiation is Diffie-Hellman key exchange. This scheme was first published by Whitfield Diffie and Martin Hellman in 1976, and is a cryptographic protocol which allows two parties that have no prior knowledge of each other to jointly establish a shared secret key over an insecure communications channel. This shared key can then be used to encrypt higher speed communications using a more conventional symmetric key cipher like AES.

Both of these schemes, plus others, use long number modular arithmetic as their basis. Due to the extremely large operand lengths (typically 1024- or 2048-bits), this kind of arithmetic processing is very slow when implemented in a standard processor, so it is perfect for offloading into dedicated hardware.

Helion RSA, Diffie-Hellman and
Modular Exponentiation Solutions

Helion offer a range of RSA, Diffie-Hellman and Modular Exponentiation solutions, covering a broad spread of speed and area requirements.

Existing offerings from other vendors concentrate on being the biggest and fastest solutions around, but we take a more considered approach, and offer not only big and fast solutions, but also extremely compact solutions which are ideal when your target throughput is lower.

As well as our ASIC solutions, these cores are also available specially targeted at FPGA, and offer superb performance in this technology; these are not simply re-targeted ASIC cores, but designed from the ground up to be highly optimal in programmable logic. In this guise, they are absolutely ideal for use in lower volume applications. Of course fully compatible versions are available bridging ASIC and FPGA, which are perfect for use in ASIC prototyping applications.

Using these cores is extremely easy; they present a shared memory interface to the outside world, into which the user simply places the operands for processing. Once in place, the engine can be started together with an indication as to what processing is required. At some time later, the engine will indicate that it has completed its processing, and the results can be read from the shared memory interface....simple!

All these solutions are in place and fully available. They have been fully proven in production ASIC and FPGA silicon by numerous customers, and are easy to use and highly efficient.

Measured Area and Performance

STD256 version - for medium rate applications

TARGET TYPICAL PERFORMANCE AREA
Altera FPGA
(Stratix II -3)
35 RSA operations per sec* 2258 ALUTs
1 M4K RAM, 61 M512 RAMs
Altera FPGA
(Stratix III -2)
49 RSA operations per sec* 2123 ALUTs
2 M9K RAMs, 58 MLABs
Xilinx FPGA
(Spartan 3 -5)
18 RSA operations per sec* 1826 slices
1 BlockRAM
Xilinx FPGA
(Virtex 4 -11)
32 RSA operations per sec* 1826 slices
1 BlockRAM
Xilinx FPGA
(Virtex 5 -3)
38 RSA operations per sec* 599 slices
1 BlockRAM


TINY32 version - for lower rate applications, eg. supporting a single secure endpoint

TARGET TYPICAL PERFORMANCE AREA
Altera FPGA
(Cyclone III -6)
1 RSA operation per sec* 680 LEs
4 M9K RAMs
Altera FPGA
(Stratix III -2)
4 RSA operations per sec* 415 ALUTs
4 M9K RAMs
Xilinx FPGA
(Spartan 3 -5)
1 RSA operation per sec* 272 slices
3 BlockRAMs
Xilinx FPGA
(Virtex 4 -11)
2 RSA operations per sec* 272 slices
3 BlockRAMs
Xilinx FPGA
(Virtex 5 -3)
4 RSA operations per sec* 159 slices
1 BlockRAM

* Based on 1024-bit RSA signatures (|E|=1024, |M|=1024). Note that this will be a much higher rate for shorter exponent values eg. for RSA verifications or Diffie-Hellman applications.

Datasheets

For full details of the whole range of Helion ModExp cores, please download the datasheet appropriate to your target technology.

Click here for the Altera FPGA core data sheet (PDF format)
Click here for the Xilinx FPGA core data sheet (PDF format)

Please contact Helion for ASIC and Actel datasheets.

Contact

For more detailed information on these or any of our other products and services, please feel free to email us at helioncores@heliontech.com and we will be pleased to discuss how we can assist with your individual requirements.


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