Helion IP Core Products - Miscellaneous solutions
In addition to our broad portfolio of data security IP cores,
Helion also has other IP and solutions available which have been
developed for particular and often associated applications.
These all benefit from Helion's normal design approach and are
therefore highly optimised and well proven solutions which can be
quickly and efficiently deployed into customer designs.
AMBA compatible Bus interfaces for use in ASIC
For applications where memory resident data must be processed under host
microprocessor control (ie a direct datapath connection is not desired),
our ARM AMBA compatible bus interface is ideal. It can be used in conjunction
with a number of our AES-based solutions (basic mode wrappers plus some of the
more complex authenticated encryption cores), to give a totally self-contained
security module.
The bus interface provides an APB register set for control and datapath
access, plus a dedicated AHB bus-mastering DMA controller for background
processing with optimum data throughput. Typically, the register interface
is used for configuring key and nonce/IV values, and DMA address and length
information, after which the host micro is free to do other tasks whilst
the DMA operation completes.
This solution has been extremely well proven in production silicon as part
of our AES Processor, but is also available for
use with other cores on request.
OPB/PLB Bus interfaces for use in Xilinx FPGA
For applications which use the embedded Power PC which is available in some
of the higher-end Xilinx FPGA devices (for example Virtex2 Pro and Virtex4 FX),
we can provide ready-designed interfaces to allow you to attach custom
processing blocks directly to the OPB and PLB PPC busses. These interface
blocks are much smaller in area terms than the corresponding building blocks
supplied with the Xilinx EDK, yet offer proven reliable operation. Using
these building blocks it is very easy for us to supply our own cryptographic
IP cores together with PPC connectivity if required.
Hypertransport Bus interfaces for use in Xilinx FPGA
Hypertransport is a bidirectional high-bandwidth, low-latency bus standard
which is intended for high performance chip interconnection. It is commonly
provided on high-rate network processors (for example those made by Broadcom
and Raza), where it can be used to connect external hardware accelerators,
for applications such as encryption. This is exactly the application for
which we developed our Hypertransport core, and we are able to make it
available to our Design Services customers who might have similar requirements.
It was designed to offer high performance results yet with reasonable area;
it has much lower resource requirements than competing solutions yet still
offers data rates up to 3.2Gbps in each direction.
Contact
For more detailed information on this or any of our other products and services,
please feel free to email us at
helioncores@heliontech.com and we will be pleased to discuss how we can assist
with your individual requirements.
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